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Freescale Semiconductor reveals PowerPC® core roadmap and scalable system-on-chip platforms

SoC platforms leverage Freescale’s enhanced PowerPC cores and broad technology portfolio to enable scalable performance, connectivity and integration

SMART NETWORKS DEVELOPER FORUM, DALLAS – April 27, 2004 – Underscoring its longstanding commitment to the PowerPC instruction set architecture, Freescale Semiconductor, a wholly owned subsidiary of Motorola Inc. (NYSE:MOT), today announced a roadmap for next-generation PowerPC® processor cores designed to provide the processing intelligence for Freescale’s system-on-chip (SoC) platforms. These SoC platforms encompass both standard and semicustom IC products that deliver scalable performance, connectivity and integration for the networking, communications and pervasive computing markets.

During a keynote speech at the Smart Networks Developer Forum (SNDF), Freescale Semiconductor executives revealed roadmap details of the company’s newly announced e300, e600 and e700 PowerPC cores, which complement the existing high-performance e500 core used in the PowerQUICC™ III communications processor family. These enhanced PowerPC cores are designed to offer a continuum of performance to address a wide range of applications, such as wireless infrastructure, next-generation DSLAMs, network storage, enterprise routing and switching, printing and imaging, telecom switching, and customer premises equipment.

Leveraging its advanced chip-level integration capabilities, Freescale Semiconductor offers SoC platforms that combine the company’s enhanced PowerPC cores with its broad technology portfolio. Freescale’s e300, e500, e600 and e700 SoC platforms are engineered to deliver scalable performance, from low to high, to meet a wide spectrum of processing and I/O requirements.

"Freescale Semiconductor has traditionally focused on meeting customer needs with processing solutions that strike the right balance between performance, connectivity and integration," said Eric Mantion, senior analyst with In-Stat/MDR. "Freescale's announcement today takes this philosophy to the next level by unveiling the company's roadmap for scalable PowerPC SoC platforms designed to address a wide range of market needs. As the number of protocols and interfaces--for both control and data planes--continues to increase, it seems likely that system developers will embrace the ability to integrate key technologies for their communications processors based on enhanced PowerPC cores and SoC platforms."

Addressing the Mid-Range: The e300 Core and Platform
Freescale Semiconductor has developed the e300 PowerPC core and corresponding e300 platform to address the low- to mid-range performance needs of the market. The e300 core is an enhanced version of the popular 603e PowerPC core used in previous-generation PowerQUICC II processors that scales from 266 to 667 MHz in 130nm process technology. Enhancements include a 32KB data cache and a 32KB instruction cache (double the amount of L1 cache available in the 603e core) along with integrated parity-checking and other performance-oriented features. The e300 core is fully software-compatible with existing 603e core-based products and provides the processing foundation for the company’s new MPC8349E PowerQUICC II™ Pro communications processor family, which was unveiled today at SNDF.

Next-Generation Performance Today: The e500 Core and Platform
Customers who require higher performance can step up to the e500 core and corresponding e500 platform, which power Freescale’s award-winning PowerQUICC III communications processors. Currently scaling up to 1 GHz, the high-performance e500 core is planned to exceed 1.5 GHz in next-generation process technologies. The e500 core delivers flexibility for application-specific optimizations and leverages application processing units (APUs) for instruction set extensions that are provided for by the PowerPC instruction set architecture. The e500 core is designed to be highly configurable and meet the specific needs of the embedded market, enabling flexible SoC platform solutions that provide an optimal balance of performance, advanced features and power consumption.

Delivering Higher Performance: The e600 and e700 Cores and Platforms
The next planned step in Freescale’s performance roadmap is the e600 core and corresponding e600 platform. An enhanced version of the high-performance G4 core used in the award-winning, high-performance MPC74xx family of PowerPC host processors, the e600 core is planned to scale beyond 2 GHz and to support chip multiprocessing (CMP) while maintaining full compatibility with the PowerPC instruction set architecture. Like its G4 predecessor, the superscalar e600 core is designed to issue four instructions per clock cycle (three instructions plus one branch) into eleven independent execution units, and to include a full 128-bit implementation of Freescale's advanced AltiVec Single Instruction Multiple Data (SIMD) vector processing technology.

Freescale Semiconductor also disclosed today at SNDF its plans to develop the next-generation 32/64-bit e700 PowerPC core and corresponding e700 platform. Processor products engineered around Freescale’s forthcoming e700 SoC platform are planned to be capable of running both 32-bit and 64-bit software and scaling to 3 GHz and beyond in next-generation process technologies.

Large Portfolio of System Technology for Customizable Platforms
In addition to leveraging enhanced PowerPC processor cores optimized for SoC design methodologies, Freescale’s scalable SoC platforms draw from the company’s large portfolio of system technology. This broad portfolio includes system fabrics (RapidIO technology, SerDes), networking acceleration (10/100/100 Ethernet, ATM, HDLC, etc.), local buses (PCI, PCI-X, PCI Express, etc.), memory controllers (DDR and DDRII), general communications peripherals, and security engines. Access to Freescale’s system technology makes it fast, easy and cost-effective to mix and match functional blocks and develop new SoC-based products optimized for a wide range of applications. Whether a customer’s system is power-sensitive, computationally demanding or I/O intensive, Freescale Semiconductor offers the scalable processing performance, breadth of connectivity technology, and integration expertise to address the design challenge.

When customers require customized solutions that are not available through standard product lines, Freescale Semiconductor can respond quickly and cost-effectively through its SemiCustom operation, which was announced today at SNDF. Freescale’s SemiCustom operation develops highly integrated, customized system-on-chip SoC platform designs built on a foundation of Freescale’s processor cores, system blocks and mixed-signal portfolio used in the company’s standard products. Leveraging its scalable, reusable PowerPC e300 and e500 platforms, Freescale Semiconductor is able to develop new SoC-based products within a 6- to 9-month window, helping customers accelerate time to market and reduce system development costs.

Ecosystem Support from Freescale, Metrowerks and Third Parties
Freescale's scalable PowerPC SoC platforms are supported by its Metrowerks subsidiary, and by a comprehensive ecosystem of development tools, operating systems and applications from third-party vendors working through Freescale's Smart Networks Alliance Program. Metrowerks provides the hardware, software and tools necessary to accelerate and streamline development of world-class products based on Freescale semiconductors. Metrowerks products and services span the development process, from board bring-up and kernel-level debugging to application creation and code analysis.

About Freescale Semiconductor
Freescale Semiconductor, Inc., ( a subsidiary of Motorola, Inc., has a 50-year history in microelectronics. Freescale Semiconductor produces semiconductors for the automotive, consumer, industrial, networking and wireless markets worldwide. Based in Austin, Texas, Freescale Semiconductor has design, manufacturing or sales operations in more than 25 countries. Freescale Semiconductor’s 2003 sales were $4.9 billion (USD).

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